Digital Logic with

Contents

Preparatory Exercises
Prior to the lab session, construct the truth table and Karnaugh map for each of the exercises as appropriate.

Objectives
Gain experience with design of logic circuits
Exercise Karnaugh mapping

Combinational Logic with EWB
In Electronics Workbench, the parts bin of logic gates includes both schematic representation of gates as well as integrated circuit packages of gates (the bottom row of the parts bin). For this exercise, rely on the first seven gates enclosed in the first row: AND, OR, NOT, NOR, NAND, XOR, and XNOR. Be careful to ignore the labeling on the gate packages in the second row where the gates are ordered differently than the first row.

Logic gates dragged from the parts bin will have two inputs. Additional inputs may be added by right-clicking on the desired gate, selecting "Component Properties", then "Number of Inputs".

EWB Logic Converter
Electronics Workbench conveniently provides an instrument called the Logic Converter which will create a truth table for a combination of gates. After the desired gate combination has been assembled, connect the inputs of the gates to the inputs A-H of the converter, followed by connection of the output.

After dragging the instrument to the worksheet, duble-click on the instrument icon to bring up the panel view;
On the expanded front panel of the instrument, click on the gate-to-truth-table button to create or update the truth table.

Here is an example of a gate combination and its truth table constructed with the Logic Converter:

The Exercises
For Exercises 2 through 5, print out the schematic of the combination of gates used along with the truth table presented by the Logic Converter.

1. Confirm that the seven logic gates available in EWB operate as expected. In particular, check the behaviour of multiple input gates. For the XOR gate with three- and four-inputs, construct the Karnaugh map and observe the patterns of ones.

2. Construct the following combination of gates and use the Logic Converter to construct the truth table. Create a Karnaugh map and use it to construct an equivalent gate combination from the least number of two-input AND, OR, and NOT gates possible.
   

   Next, construct an implementation of this truth table using only two-input NOR gates. Confirm that the truth table is identical using the Logic Convertor of EWB.

   (For the NOR gate assembly, focus on the zeroes rather than the ones in the Karnaugh mapping, as suggested in E9.1 in the textbook. Also, do not forget about DeMorgan's theorems!)

3. Prove the following Boolean identity, used in your textbook at the top of page 240, by assembling the appropriate gates and observing the truth table.
   

4. Design a combination of gates that will accept four inputs A through D and provide a single output that will be true if two, three, or four of the inputs are set.

   (I have found a combination of five multiple-input gates that will do this. Can you construct one with fewer gates?)

5. Determine a gate combination that will set the output true if an even number of four inputs is set.

   (I have managed to do this with a single gate available in Electronics Workbench.)