SCEN103 SCEN103 Class 31

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Introduction to Digital Logic

NAND Gate

[Schematic of NAND gate]

The truth table for the NAND gate is commonly written in one of the two forms below, where the true state T is represented by 1 and the false state F is represented by 0. (See previous class for physical realization via transistor switches.

A: B: C: A: B: C:
(in) (in) (out)   (in) (in) (out)
F F T   0 0 1
F T T   0 1 1
T F T   1 0 1
T T F   1 1 0

The NAND is one of the binary operations most heavily used in digital logic, an operation involving two input states, resulting in one of two possible output states. These electronic circuits are known as gates because they control the flow of bits (information) through the overall circuit; e.g., the computer.

Note that the truth table is independent of fabrication details; i.e. whether it is a CMOS gate or from a different logic "family" does not change the logic of the operation -- the actual gate is constructed to create the desired truth table.


AND Gate

[Schematic of AND gate]

A: B: C:
(in) (in) (out)
0 0 0
0 1 0
1 0 0
1 1 1

The AND operation has the usual logical significance -- the outcome is true if, and only if, both inputs are true. The symbol for AND looks like the "dot" representing the usual multiplication of two numbers; note that the truth table looks correct for multiplication of "0"s and "1"s.

Please note the connection between the NAND and the AND gate. The output of the NAND gate is opposite of the AND gate -- NAND stands for NOT AND. In digital logic NOT represents the opposite -- NOT true is false, NOT 1 is 0. The symbol for NOT is a bar over whatever quantity is being "NOTed." Compare the schematic symbols for NAND and AND -- the "bubble" near the output of the NAND gate represents the NOT operation.


NOT "Gate"

[Schematic of NOT gate]

A: C:
(in) (out)
0 1
1 0


OR Gate

[Schematic of OR gate]

A: B: C:
(in) (in) (out)
0 0 0
0 1 1
1 0 1
1 1 1

The OR operation also has the usual logical significance -- the outcome is true if either of the two inputs are true. The symbol for OR looks like the "plus" representing the usual addition of two numbers; note that the truth table looks correct for addition of "0"s and "1"s, except for the last entry.


NOR Gate

[Schematic of NOR gate]

A: B: C:
(in) (in) (out)
0 0 1
0 1 0
1 0 0
1 1 0


Example of combinational logic -- driving a 7-segment display.
7 Segment Decoder from my PHYS345 course.
Software demo -- Electronics Workbench and ghwdemo.ca4
Conversion of "bits" into a more easily read numeral.


Group Activities

Using the truth tables above, construct the truth table for the following combination of gates:

[Schematic of XOR gate]

What does this circuit accomplish?
(One point to each member of group for correct truth table; please record names of those contributing.)

Remember to do the digital logic homework assignment!

Online Resources

Combinational Logic from the Digital Logic/Play-Hookey Website
Comments, suggestions, or requests to ghw@udel.edu.
"http://www.physics.udel.edu/~watson/scen103/99s/clas0507.html"
Last updated May 7, 1999.
Copyright George Watson, Univ. of Delaware, 1999.