PHYS345 Electricity and Electronics

Quiz 10: Sequential Logic

Consider the following timing diagram:

Timing diagram for 3-bit counter

Construct the corresponding state diagram for the seven included states Q2Q1Q0.

State diagram template

There is one excluded state. Design a 3-bit counter circuit to force the excluded state to enter the cycle of included states at 010.

3-bit counter template


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Last updated November 17, 1999.
Copyright George Watson, Univ. of Delaware, 1999.