If student standing, then bit is set.
If student is seated, then bit is clear.
Watching carefully, intermediate states are observed in the ripple counter. In particular, in going from 7 to 8, intermediate states of 6, 4, and 0 are observed. The presence of intermediate states is a serious failing of ripple counters. Synchronous counters, where all flip-flops are clocked by the same signal and all outputs subsequently change simultaneously, are preferred to asynchronous counters such as the ripple counter.
Last updated Nov. 11, 1998.
Copyright George Watson, Univ. of Delaware, 1998.