NAME:___________________________

Laboratory section number (or day/time):___________________________

PHYS345 Second Midterm Exam December 2, 1999

This is a closed book exam.

Programmable calculators and graphing calculators may be used during this exam.

Since this exam booklet may be separated for grading; it is important to:

Show ALL work on problem sheet and only on that sheet.

Please read questions carefully.

Credit may be lost inadvertently if solutions are not neat and orderly.

Be careful with units, signs, and significant figures.


1. (20 points)

Justify your answers in all cases!

  1. Find the combination of logic gates to implement this truth table using the fewest number of gates. Draw a circuit schematic. (Two point bonus for four or fewer dual-input gates!)
    DC\BA   00     01     11     10  
    00 1 1 1 1
    01 1 0 0 0
    11 1 0 0 0
    10 1 0 0 1

  2. Construct a truth table proof to demonstrate that A'.B + A.B' = A XOR B

    AB                                                 
    00       
    01       
    10       
    11       

  3. A simple inverting amplifier of gain 26 dB has been constructed from a good op amp, an input resistance of 500 ohm, and a feedback resistance of 10k. The amplifier is used to drive a current through a 1k load resistance. When 100 mV is applied to the input,

    • What is the current through the input resistor?

    • What is the current into the inverting terminal?

    • What is the current through the feedback resistor?

    • What is the current through the load resistor?

    • What is the current through the output of the amplifier? Source (out) or sink (in)?


2. (20 points)

In the PHYS345 lab you notice a partially completed 2-bit counter. You recall a recent conversation where the instructor was extolling the virtues of an enable line to control whether the counter would count up or count down. That is, when E is true, the counter should count up through the states in the repetitive sequence 0, 1, 2, 3 and when E is false, the counter should count down in the sequence 3, 2, 1, 0.

Complete the circuit diagram so that it works as desired; that is, set up the D input of flip-flop 0.

2-bit counter, partially wired

Truth table for the three-input exclusive NOR gate:
  A    B    C   XNOR
0 0 0   1
0 0 1   0
0 1 1   1
0 1 0   0
1 1 0   1
1 0 0   0
1 0 1   1
1 1 1   0


3. (20 points)

At a different workstation in the PHYS345 lab you notice the 2-bit counter shown. It is different from the circuit you designed in the previous problem but you are interested in learning what it does.

Construct the timing diagrams below to ascertain the state diagram for both E=1 and E=0.

2-bit counter, incorrectly wired

timing diagram for 2-bit counter, 00 start, E=0 Complete the state diagram to show the behavior of this 2-bit counter for E disabled.

template for state diagram for 2-bit counter

   
Complete the state diagram to show the behavior of this 2-bit counter for E enabled.

template for state diagram for 2-bit counter

timing diagram for 2-bit counter, 11 start, E=1


4. (20 points)

  1. We were forced to replace a RF (radio frequency) power amplifier in the cavity dumper electronics of a picosecond dye laser in my research lab this semester. Because the high frequency involved (38 MHz) dictates impedance matching between elements, all input and output impedances, as well as the load of the cavity dumper, are 50 ohm. If the open-circuit voltage of the preamplifier is 1.5 V, what voltage gain (in dB) is needed in the power amp to deliver a power of 7 W to the cavity dumper load?

    cascaded amplifiers with load

  2. We were able to buy a suitable off-the-shelf amplifier for $995; however, its gain was 40 dB. We added an attenuator to reduce the overall gain to the value desired above. What attenuation (in dB) was added?

  3. Design a simple attenuator (passive voltage divider), with total resistance of 50 ohm, that will provide the attenuation above.


5. (20 points)

  1. Design a differentiator circuit that will have a gain of 25 dB for a 100 mV signal at 200 Hz. Available for the design are good quality op amps, a 1.0 mF capacitor, and a wide range of resistors.

  2. What is the input impedance seen by the signal for your circuit?

  3. The differentiator can be used to suppress sources of noise at frequencies lower than the signal of interest. For a noise source of 10 mV at 60 Hz and the signal above, what is the improvement in the signal-to-noise ratio (in dB) when the differentiator is used?


"http://www.physics.udel.edu/~watson/phys345/exams/mid2-99f.html"
Last updated April 25, 2005.
Copyright George Watson, Univ. of Delaware, 1999.