1. This is how a NOT operation is often represented schematically.
2. Sometimes the NOT operation is shown explicitly as a gate.
3. Tying the inputs of a dual-input NAND gate will yield a NOT gate.
4. Tying the inputs of a dual-input NOR gate will similarly yield a NOT gate.
Last updated Nov. 4, 1999.
Copyright George Watson, Univ. of Delaware, 1999.